1. Identify the digital circuit and
write its truth table.
Note:
Here V1 and V2 are the input signals and O1 and O2 are the output signals.
Solution:
Case 1: Assume
V1=5V, V2=0V
When V1 is 5V,
the transistor Q1 is turned ON and hence output O1 = 0V. Also V2=0V, turns OFF
the transistor Q2, giving O2=5V.
Case 2: Assume V1=0V, V2=5V
When V1 is 0V,
the transistor Q1 is turned OFF and hence output O1 = 5V. Also V2=5V, turns ON
the transistor Q2, giving O2=0V.
Case 3: Assume V1=0V,
V2=0V
Since both the
inputs are 0V, the outputs cross-connected to base of opposite transistors act
as input. Hence if O1 is 5V, the transistor Q2 is turned ON and hence output O2
= 0V. Now since O2=0V, the transistor Q1 turns OFF, giving O1=5V.
Case 4: Assume V1=5V,
V2=5V
In this case
both the inputs are high, and hence both transistors try turning ON and
maintain their outputs O1 and O2 low.
The above 4
cases are equivalent to an SR latch. Hence the digital circuit is an SR Latch.
2. Draw the output waveform vo
for the circuit shown below with the given input. (Assume β = 100)
Solution: In
the above circuit as soon as the input voltage goes higher than 5V (due to 5V
Zener diode connected to the emitter), large current flows to drive the transistor
into saturation region and the output switches to low state. The output voltage
is restricted to 5V due to the presence of Zener diode. When the input is lower
than 5V, the transistor is in cut-off region and output remains is high state,
i.e., at 15V.
The
output waveform is as shown below.
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